building high performance IP
There is an ever increasing need for DSP that can handle high data rates. The industry is constantly pushing out higher resolution and higher sample rate converters. Our mission is to enable the industry to take advantage of these technological achievements, while providing maximum flexibility with high optimization.
Our cores utilize heavy paramaterization allowing a high degree of customizability at compile time. Modify data widths, samples per cycle, noise floor characteristics, latency, and much more. This allows our IP cores to scale with customer’s projects simply by modifying parameters.
FMAX and beyond
Converter devices are now pushing sample rates that are much higher then the Fmax of industry leading FPGA devices. MCLEAN LABS develops IP that processing data with multiple(N) samples per clock, where N is a compile time parameter. This rationalization allows our customers to take full advantage of their hardware to unlock ultra wide-band applications.
All of our pricing options include the verilog source code with documentation and test benches. We design our cores to be flexibile, making our cores perfect for applications like software defined radio, but we also make it easy to optimize our IP to work with fixed function designs. This optionality provides the best value and usability of our IP.