MLD211 - SampleFlex CIC Decimator
|Sample rate||Well in excess of 1Ghz||<200Mhz|
|Decimation Rate||Dynamic, step size of 1||Configurable at compile time|
|CIC Order||Configurable at compile time||Fixed|
|Resolution||Configurable at compile time||fixed|
|Include Gain Correction||Yes, bypassable||no|
|Source included at base price||yes||no|
Complex Decimation is a fundamental piece of any rx radio chain. The MLD211 is a high performance integer decimator that offers a high degree of configurability.
Unlock sample rates >> fMax by consuming multiple samples per clock.
Inputs and outputs are highly adjustable with parameters to fit your designs to ease integration. Change many parameters at compile time to chose your own trade offs.
Paramaterized N sample per clock processing
Paramaterized CIC order
Paramaterized data I/O size
Paramaterized flop stages
Increase parallelization to reduce fdev
Decide how many stages are required to fit your system’s need
Easy integration with flexible I/O